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MC68HC908AP64CFB 参数 Datasheet PDF下载

MC68HC908AP64CFB图片预览
型号: MC68HC908AP64CFB
PDF下载: 下载PDF文件 查看货源
内容描述: [MC68HC908AP64CFB]
分类和应用: 外围集成电路时钟
文件页数/大小: 325 页 / 1651 K
品牌: FREESCALE [ Freescale ]
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Infrared Serial Communications Interface Module (IRSCI)  
12.2 Pin Name Conventions  
The generic names of the IRSCI I/O pins are:  
RxD (receive data)  
TxD (transmit data)  
IRSCI I/O (input/output) lines are implemented by sharing parallel I/O port pins. The full name of an IRSCI  
input or output reflects the name of the shared port pin. Table 12-1 shows the full names and the generic  
names of the IRSCI I/O pins. The generic pin names appear in the text of this section.  
Table 12-1. Pin Name Conventions  
Generic Pin Names:  
Full Pin Names:  
RxD  
TxD  
PTC6/SCTxD  
PTC7/SCRxD  
NOTE  
When the IRSCI is enabled, the SCTxD pin is an open-drain output and  
requires a pullup resistor to be connected for proper SCI operation.  
Addr.  
Register Name  
Bit 7  
LOOPS  
0
6
ENSCI  
0
5
4
3
WAKE  
0
2
ILTY  
0
1
PEN  
0
Bit 0  
PTY  
0
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
0
M
0
IRSCI Control Register 1  
(IRSCC1)  
$0040  
0
SCTIE  
TCIE  
0
SCRIE  
0
ILIE  
0
TE  
RE  
0
RWU  
0
SBK  
0
IRSCI Control Register 2  
(IRSCC2)  
$0041  
$0042  
$0043  
$0044  
$0045  
$0046  
$0047  
0
0
R8  
T8  
DMARE  
DMATE  
ORIE  
NEIE  
FEIE  
PEIE  
IRSCI Control Register 3  
(IRSCC3)  
U
U
0
0
0
0
0
0
SCTE  
TC  
SCRF  
IDLE  
OR  
NF  
FE  
PE  
IRSCI Status Register 1  
(IRSCS1)  
1
1
0
0
0
0
0
0
BKF  
RPF  
IRSCI Status Register 2  
(IRSCS2)  
0
0
0
0
0
0
0
0
R7  
T7  
R6  
T6  
R5  
T5  
R4  
T4  
R3  
T3  
R2  
T2  
R1  
T1  
R0  
T0  
IRSCI Data Register  
(IRSCDR)  
Unaffected by reset  
0
CKS  
0
SCP1  
SCP0  
R
0
SCR2  
0
SCR1  
0
SCR0  
0
IRSCI Baud Rate Register  
(IRSCBR)  
0
0
0
0
0
0
IRSCI Infrared Control  
R
R
0
TNP1  
TNP0  
0
IREN  
0
Register Write:  
(IRSCIRCR)  
Reset:  
0
0
0
0
0
= Unimplemented  
R = Reserved  
U = Unaffected  
Figure 12-1. IRSCI I/O Registers Summary  
MC68HC908AP Family Data Sheet, Rev. 4  
182  
Freescale Semiconductor  
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