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MC68HC11P1CFN3 参数 Datasheet PDF下载

MC68HC11P1CFN3图片预览
型号: MC68HC11P1CFN3
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 268 页 / 2323 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Serial Communications Interface (SCI)  
M — Mode (select character format)  
1 = Start bit, 9 data bits, 1 stop bit.  
0 = Start bit, 8 data bits, 1 stop bit.  
WAKE — Wakeup by address mark/idle  
1 = Wakeup by address mark (most significant data bit set).  
0 = Wakeup by IDLE line recognition.  
ILT — Idle line type  
1 = Long (SCI counts ones only after stop bit).  
0 = Short (SCI counts consecutive ones after start bit).  
This bit determines which of two types of idle line detection method is  
used by the SCI receiver. In short mode the stop bit and any bits that  
were ones before the stop bit will be considered as part of that string  
of ones, possibly resulting in erroneous or premature detection of an  
idle line condition. In long mode the SCI system does not begin  
counting ones until a stop bit is received.  
PE — Parity enable  
1 = Parity enabled.  
0 = Parity disabled.  
PT — Parity type  
1 = Parity odd (an odd number of ones causes parity bit to be zero,  
an even number of ones causes parity bit to be one).  
0 = Parity even (an even number of ones causes parity bit to be  
zero, an odd number of ones causes parity bit to be one).  
Technical Data  
MC68HC11P2 — Rev 1.0  
Serial Communications Interface (SCI)  
For More Information On This Product,  
Go to: www.freescale.com  
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