Freescale Semiconductor, Inc.
Pin Descriptions
2.8 Interrupt request (IRQ)
The IRQ input provides a means of applying asynchronous interrupt
requests to the MCU. Either falling edge sensitive triggering or level
sensitive triggering is program selectable (OPTION register). IRQ is
always configured to level sensitive triggering at reset.
NOTE:
Connect an external pull-up resistor, typically 4.7 k¾, to V
DD
when IRQ
is used in a level sensitive wired-OR configuration. See also
Nonmaskable interrupt (XIRQ/VPPE).
Freescale Semiconductor, Inc...
2.9 Nonmaskable interrupt (XIRQ/VPPE)
The XIRQ input provides a means of requesting a non-maskable
interrupt after reset initialization. During reset, the X bit in the condition
code register (CCR) is set and any interrupt is masked until MCU
software enables it. Because the XIRQ input is level-sensitive, it can be
connected to a multiple-source wired-OR network with an external pull-
up resistor to V
DD
. XIRQ is often used as a power loss detect interrupt.
Whenever XIRQ or IRQ is used with multiple interrupt sources (IRQ
must be configured for level sensitive operation if there is more than one
source of IRQ interrupt), each source must drive the interrupt input with
an open-drain type of driver to avoid contention between outputs. There
should be a single pull-up resistor near the MCU interrupt input pin
(typically 4.7 k¾). There must also be an interlock mechanism at each
interrupt source so that the source holds the interrupt line low until the
MCU recognizes and acknowledges the interrupt request. If one or more
interrupt source is still pending after the MCU services a request, the
interrupt line will still be held low and the MCU will be interrupted again
as soon as the interrupt mask bit in the MCU is cleared (normally upon
return from an interrupt). Refer to
Resets and Interrupts.
The VPPE pin is used to input the external EPROM programming
voltage, which must be present during EPROM programming.
Technical Data
Pin Descriptions
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MC68HC11P2 — Rev 1.0
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