Freescale Semiconductor, Inc.
Resets and Interrupts
Table 10-3. Highest priority interrupt selection
PSELx
Interrupt source promoted
4
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
3
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
2
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
reserved (default to IRQ)
reserved (default to IRQ)
reserved (default to IRQ)
IRQ (external pin)
Real-time interrupt
Timer input capture 1
Timer input capture 2
Timer input capture 3
Timer output compare 1
Timer output compare 2
Timer output compare 3
Timer output compare 4
Timer output compare 5/input capture 4
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI1 serial system
SCI2/MI BUS serial system
SCI3/MI BUS serial system
reserved (default to IRQ)
reserved (default to IRQ)
Technical Data
MC68HC11P2 — Rev 1.0
Resets and Interrupts
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