Freescale Semiconductor, Inc.
Motorola Interconnect Bus (MI BUS)
Message validation
T8
Transmit buffer
LOPS2
WOMS2
MIE2
M2
10/11-bit TX shift register
TXD2
H 8 7
0 L
C R 1
WAKE2
ILT2
ST4XCK
clock
2
S
WOMS
PE2
MIE2
Transmitter
control
PT2
PT2
TE2
SBK2
S
TIE2
Flag control
TCIE2
RIE2
ILIE2
TE2
MIE2
RE2
RE2
Receiver
control
RWU2
SBK2
WOMS
10/11-bit RX shift register
Data
recovery
RXD2
8 7
0
STOP
START
R8
Receive buffer
S2SR1
S2SR2
OR2
&
&
&
RIE2
IDLE2
&
ILIE2
RDRF2
RIE2
SCI interrupt request
+
TC2
&
TCIE2
Note: † = always reads as zero
TDRE2
TIE2
= not used in MI BUS mode
Internal data bus
MC68HC11P2 — Rev 1.0
Technical Data
Motorola Interconnect Bus (MI BUS)
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