Freescale Semiconductor, Inc.
Serial Communications Interface (SCI)
Additional SCI subsystems
5.10.1.1 S2BDH, S2BDL — SCI2/3 baud rate control registers
State
on reset
S2B12 S2B11 S2B10 S2B9 S2B8 0000 0000
$0051 S2B7 S2B6 S2B5 S2B4 S2B3 S2B2 S2B1 S2B0 0000 0100
Address bit 7
bit 6
bit 5 bit 4
bit 3
bit 2
bit 1
bit 0
SCI/MI 2/3 baud high (S2BDH) $0050 B2TST B2SPL
SCI/MI 2/3 baud low (S2BDL)
0
The contents of this register determine the baud rate for both SCI2 and
SCI3. For details of the bits and the corresponding baud rates see
SCBDH, SCBDL — SCI baud rate control registers. This register also
controls the MI BUS clock rate (see Motorola Interconnect Bus
(MI BUS)).
5.10.1.2 S2CR1 — SCI2 control register 1
State
on reset
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
WOMS
2
WAKE
2
SCI/MI 2 control 1 (S2CR1)
$0052 LOPS2
MIE2
M2
ILT2 PE2
PT2 0000 0000
The S2CR1 register provides the control bits that determine word length
and select the method used for the wakeup feature. Bit 5 has an MI BUS
control function detailed below (for details of the other bits see SCCR1
— SCI control register 1).
MIE2 — Motorola interface bus enable 2
1 = MI BUS is enabled for this subsystem.
0 = The SCI functions normally.
When MIE2 is set, the SCI2 registers, bits and pins assume the
functionality required for MI BUS.
5.10.1.3 S2CR2 — SCI2 control register 2
State
on reset
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
SCI/MI 2 control 2 (S2CR2)
$0053 TIE2 TCIE2 RIE2 ILIE2 TE2 RE2 RWU2 SBK2 0000 0000
The S2CR2 register provides the control bits that enable or disable
individual SCI functions. For details of the bits, see SCCR2 — SCI
MC68HC11P2 — Rev 1.0
Technical Data
Serial Communications Interface (SCI)
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