Design Considerations
20.2
Electrical Design Considerations
CAUTION
This device contains circuitry protecting against damage due to
high static voltage or electrical fields. However, normal
precautions should be taken to avoid exceeding maximum
voltage ratings. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (e.g., either
GND or VCC). The suggested value for a pullup or pulldown
resistor is 10 k ohm.
Use the following list of recommendations to assure correct DSP operation:
•
•
•
Provide a low-impedance path from the board power supply to each VCC pin on the DSP and from the board ground to
each GND pin.
Use at least six 0.01–0.1 µF bypass capacitors positioned as close as possible to the four sides of the package to
connect the VCC power source to GND.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip VCC and GND pins are less
than 1.2 cm (0.5 inch) per capacitor lead.
•
•
•
Route the DVDD pin carefully to minimize noise.
Use at least a four-layer PCB with two inner layers for VCC and GND.
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be minimal. This
recommendation particularly applies to the IRQA, IRQB, IRQC, and IRQD pins. Maximum PCB trace lengths on the
order of 15 cm (6 inches) are recommended.
•
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance. This is
especially critical in systems with higher capacitive loads that could create higher transient currents in the VCC and GND
circuits.
•
•
Take special care to minimize noise levels on the VCCP and GNDP pins.
If multiple DSP56371 devices are on the same board, check for cross-talk or excessive spikes on the supplies due to
synchronous operation of the devices.
•
•
RESET must be asserted when the chip is powered up. A stable EXTAL signal must be supplied before deassertion of
RESET.
At power-up, ensure that the voltage difference between the 3.3 V tolerant pins and the chip VCC never exceeds a 3.00 V.
20.3
Power Consumption Considerations
Power dissipation is a key issue in portable DSP applications. Some of the factors which affect current consumption are
described in this section. Most of the current consumed by CMOS devices is alternating current (ac), which is charging and
discharging the capacitances of the pins and internal nodes.
Current consumption is described by the following formula:
I = C × V × f
where C
=
=
=
node/pin capacitance
voltage swing
frequency of node/pin toggle
V
f
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DSP56371 Technical Data
Freescale Semiconductor
FREESCALE [ Freescale ]
