I_TIM1C EQU I_VEC+$28
I_TIM1OF EQU I_VEC+$2A
I_TIM2C EQU I_VEC+$2C
I_TIM2OF EQU I_VEC+$2E
; TIMER 1 compare
; TIMER 1 overflow
; TIMER 2 compare
; TIMER 2 overflow
;------------------------------------------------------------------------
; ESSI Interrupts
;------------------------------------------------------------------------
I_SI0RD EQU I_VEC+$30
I_SI0RDE EQU I_VEC+$32
I_SI0RLS EQU I_VEC+$34
I_SI0TD EQU I_VEC+$36
I_SI0TDE EQU I_VEC+$38
I_SI0TLS EQU I_VEC+$3A
I_SI1RD EQU I_VEC+$40
I_SI1RDE EQU I_VEC+$42
I_SI1RLS EQU I_VEC+$44
I_SI1TD EQU I_VEC+$46
I_SI1TDE EQU I_VEC+$48
I_SI1TLS EQU I_VEC+$4A
; ESSI0 Receive Data
; ESSI0 Receive Data With Exception Status
; ESSI0 Receive last slot
; ESSI0 Transmit data
; ESSI0 Transmit Data With Exception Status
; ESSI0 Transmit last slot
; ESSI1 Receive Data
; ESSI1 Receive Data With Exception Status
; ESSI1 Receive last slot
; ESSI1 Transmit data
; ESSI1 Transmit Data With Exception Status
; ESSI1 Transmit last slot
;------------------------------------------------------------------------
; SCI Interrupts
;------------------------------------------------------------------------
I_SCIRD EQU I_VEC+$50
I_SCIRDE EQU I_VEC+$52
I_SCITD EQU I_VEC+$54
I_SCIIL EQU I_VEC+$56
I_SCITM EQU I_VEC+$58
; SCI Receive Data
; SCI Receive Data With Exception Status
; SCI Transmit Data
; SCI Idle Line
; SCI Timer
;------------------------------------------------------------------------
; HOST Interrupts
;------------------------------------------------------------------------
I_HPTT
I_HPTA
I_HPPE
I_HPTC
I_HPMR
I_HSR
I_HPMT
I_HST
I_HPMA
EQU I_VEC+$60
EQU I_VEC+$62
EQU I_VEC+$64
EQU I_VEC+$66
EQU I_VEC+$68
EQU I_VEC+$6A
EQU I_VEC+$6C
EQU I_VEC+$6E
EQU I_VEC+$70
; Host PCI Transaction Termination
; Host PCI Transaction Abort
; Host PCI Parity Error
; Host PCI Transfer Complete
; Host PCI Master Receive
; Host Slave Receive
; Host PCI Master Transmit
; Host Slave Transmit
; Host PCI Master Address
; Host Command/Host NMI (Default)
I_HCNMI EQU I_VEC+$72
;------------------------------------------------------------------------
; INTERRUPT ENDING ADDRESS
;------------------------------------------------------------------------
I_INTEND EQU I_VEC+$FF
; last address of interrupt vector space
DSP56301 Technical Data, Rev. 10
Freescale Semiconductor
A-17
FREESCALE [ Freescale ]
