M_TSMB1 EQU $FFFFA3; SSI1 Transmit Slot Mask Register B
M_RSMA1 EQU $FFFFA2; SSI1 Receive Slot Mask Register A
M_RSMB1 EQU $FFFFA1; SSI1 Receive Slot Mask Register B
;
SSI Control Register A Bit Flags
M_PM EQU $FF
M_PSR EQU 11
; Prescale Modulus Select Mask (PM0-PM7)
; Prescaler Range
M_DC EQU $1F000 ; Frame Rate Divider Control Mask (DC0-DC7)
M_ALC EQU 18 ; Alignment Control (ALC)
M_WL EQU $380000; Word Length Control Mask (WL0-WL7)
M_SSC1 EQU 22 ; Select SC1 as TR #0 drive enable (SSC1)
;
SSI Control Register B Bit Flags
M_OF EQU $3
M_OF0 EQU 0
M_OF1 EQU 1
; Serial Output Flag Mask
; Serial Output Flag 0
; Serial Output Flag 1
M_SCD EQU $1C ; Serial Control Direction Mask
M_SCD0 EQU 2 ; Serial Control 0 Direction
M_SCD1 EQU 3
M_SCD2 EQU 4
M_SCKD EQU 5
M_SHFD EQU 6
; Serial Control 1 Direction
; Serial Control 2 Direction
; Clock Source Direction
; Shift Direction
M_FSL EQU $180; Frame Sync Length Mask (FSL0-FSL1)
M_FSL0 EQU 7 ; Frame Sync Length 0
M_FSL1 EQU 8 ; Frame Sync Length 1
M_FSR EQU 9
; Frame Sync Relative Timing
M_FSP EQU 10 ; Frame Sync Polarity
M_CKP EQU 11 ; Clock Polarity
M_SYN EQU 12 ; Sync/Async Control
M_MOD EQU 13 ; SSI Mode Select
M_SSTE EQU $1C000; SSI Transmit enable Mask
M_SSTE2 EQU 14; SSI Transmit #2 Enable
M_SSTE1 EQU 15 ; SSI Transmit #1 Enable
M_SSTE0 EQU 16 ; SSI Transmit #0 Enable
M_SSRE EQU 17 ; SSI Receive Enable
M_SSTIE EQU 18 ; SSI Transmit Interrupt Enable
M_SSRIE EQU 19; SSI Receive Interrupt Enable
M_STLIE EQU 20 ; SSI Transmit Last Slot Interrupt Enable
M_SRLIE EQU 21 ; SSI Receive Last Slot Interrupt Enable
M_STEIE EQU 22; SSI Transmit Error Interrupt Enable
M_SREIE EQU 23 ; SSI Receive Error Interrupt Enable
;
SSI Status Register Bit Flags
M_IF EQU $3
M_IF0 EQU 0
M_IF1 EQU 1
M_TFS EQU 2
M_RFS EQU 3
M_TUE EQU 4
M_ROE EQU 5
M_TDE EQU 6
M_RDF EQU 7
; Serial Input Flag Mask
; Serial Input Flag 0
; Serial Input Flag 1
; Transmit Frame Sync Flag
; Receive Frame Sync Flag
; Transmitter Underrun Error FLag
; Receiver Overrun Error Flag
; Transmit Data Register Empty
; Receive Data Register Full
;
SSI Transmit Slot Mask Register A
M_SSTSA EQU $FFFF ; SSI Transmit Slot Bits Mask A (TS0-TS15)
DSP56301 Technical Data, Rev. 10
Freescale Semiconductor
A-9
FREESCALE [ Freescale ]
