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DSP56301VF100 参数 Datasheet PDF下载

DSP56301VF100图片预览
型号: DSP56301VF100
PDF下载: 下载PDF文件 查看货源
内容描述: 24位数字信号处理器 [24-Bit Digital Signal Processor]
分类和应用: 外围集成电路数字信号处理器时钟
文件页数/大小: 124 页 / 2296 K
品牌: FREESCALE [ Freescale ]
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M_STRQ EQU 1 ; Slave Transmit Data Request  
M_SRRQ EQU 2 ; Slave Receive Data Request  
M_HF02 EQU $38; Host Flag 0-2 Mask  
M_HF0 EQU 3  
M_HF1 EQU 4  
M_HF2 EQU 5  
; Host Flag 0  
; Host Flag 1  
; Host Flag 2  
;
DSP PCI Status Register Bit Flags  
M_MWS EQU 0 ; PCI Master Wait States  
M_MTRQ EQU 1 ; PCI Master Transmit Data Request  
M_MRRQ EQU 2 ; PCI Master Receive Data Request  
M_MARQ EQU 4 ; PCI Master Address Request  
M_APER EQU 5  
M_DPER EQU 6  
M_MAB EQU 7  
M_TAB EQU 8  
M_TDIS EQU 9  
M_TRTY EQU 10  
M_TO EQU 11  
; PCI Address Parity Error  
; PCI Data Parity Error  
; PCI Master Abort  
; PCI Target Abort  
; PCI Target Disconnect  
; PCI Target Retry  
; PCI Time Out Termination  
M_RDC EQU $3F0000; Remaining Data Count Mask (RDC5-RDC0)  
M_RDC0 EQU 16  
M_RDC1 EQU 17  
M_RDC2 EQU 18  
M_RDC3 EQU 19  
M_RDC4 EQU 20  
M_RDC5 EQU 21  
M_HACT EQU 23  
; Remaining Data Count  
; Remaining Data Count  
; Remaining Data Count  
; Remaining Data Count  
; Remaining Data Count  
; Remaining Data Count  
; Hi32 Active  
0
1
2
3
4
5
;------------------------------------------------------------------------  
;
;
;
EQUATES for Serial Communications Interface (SCI)  
;------------------------------------------------------------------------  
;
Register Addresses  
M_STXH EQU $FFFF97; SCI Transmit Data Register (high)  
M_STXM EQU $FFFF96; SCI Transmit Data Register (middle)  
M_STXL EQU $FFFF95; SCI Transmit Data Register (low)  
M_SRXH EQU $FFFF9A; SCI Receive Data Register (high)  
M_SRXM EQU $FFFF99; SCI Receive Data Register (middle)  
M_SRXL EQU $FFFF98; SCI Receive Data Register (low)  
M_STXA EQU $FFFF94; SCI Transmit Address Register  
M_SCR EQU $FFFF9C; SCI Control Register  
M_SSR EQU $FFFF93; SCI Status Register  
M_SCCR EQU $FFFF9B; SCI Clock Control Register  
;
SCI Control Register Bit Flags  
M_WDS EQU $7  
M_WDS0 EQU 0  
M_WDS1 EQU 1  
M_WDS2 EQU 2  
M_SSFTD EQU 3  
M_SBK EQU 4  
M_WAKE EQU 5  
M_RWU EQU 6  
M_WOMS EQU 7  
; Word Select Mask (WDS0-WDS3)  
; Word Select 0  
; Word Select 1  
; Word Select 2  
; SCI Shift Direction  
; Send Break  
; Wakeup Mode Select  
; Receiver Wakeup Enable  
; Wired-OR Mode Select  
DSP56301 Technical Data, Rev. 10  
Freescale Semiconductor  
A-7  
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