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AN2961 参数 Datasheet PDF下载

AN2961图片预览
型号: AN2961
PDF下载: 下载PDF文件 查看货源
内容描述: []
分类和应用:
文件页数/大小: 50 页 / 706 K
品牌: FREESCALE [ Freescale ]
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Hardware Connections  
I/O pin  
I/O pin  
ENABLEPA  
ENABLELNA  
STROBE  
I/O pin  
RSSIC  
I/O pin  
DATACLK  
Timer channel clock input  
RSSIOUT  
I/O pin  
MCU  
ECHO  
CONFB  
SEB  
I/O pin  
I/O pin  
TX DATA  
Timer channel output  
MOSI  
MISO  
SCLK  
MOSI  
MISO  
SCLK  
SS  
Required  
Optional  
Figure 4. Echo Hardware Connections  
A brief description of each connection follows:  
MOSI, MISO, SCLK, and SS—SPI connections allowing configuration information to be sent to  
Echo and received data to be sent back to the MCU. SS must be held low when the MCU is an SPI  
slave and awaiting data from Echo. In many systems this can be grounded with a pulldown resistor.  
TX DATA—The MOSI pin on Echo has dual functionality. When Echo is in receive mode,  
received data is output on the SPI to the MCU. When in transmit mode, the MOSI pin directly  
receives the waveform to be modulated. The driver generates the Manchester encoded waveform  
using a timer channel, and the corresponding channel pin is connected to MOSI when in transmit  
mode.  
SEB—Enables the digital interface on Echo. When SEB is high, the MOSI, MISO, and SCLK pins  
on Echo are high impedance, allowing other devices to be used on the SPI.  
CONFB—Resets Echo into configuration mode to allow access to Echo’s internal registers.  
Software Drivers for MC33696, Rev. 1  
Freescale Semiconductor  
7
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