11/2/95
SECTION 1: OVERVIEW
UM Rev.1.0
Freescale Semiconductor, Inc.
LIST OF ILLUSTRATIONS (Continued)
Figure
Page
Number
Title
Number
9-3
9-4
9-5
9-6
9-7
9-8
9-9
Output Latch Cell (O.Latch)...................................................................................9-7
Input Pin Cell (I.Pin)................................................................................................9-7
Active-High Output Control Cell (IO.Ctl1)...........................................................9-8
Active-Low Output Control Cell (IO.Ctl0)............................................................9-8
Bidirectional Data Cell (IO.Cell)...........................................................................9-9
General Arrangement for Bidirectional Pins......................................................9-9
Bypass Register ......................................................................................................9-11
10-1 Minimum System Configuration Block Diagram.............................................10-1
10-2 Sample Crystal Circuit.........................................................................................10-2
10-3 Statek Corporation Crystal Circuit.....................................................................10-2
10-4 XFC and V
Capacitor Connections........................................................10-3
CCSYN
10-5 SRAM Interface .....................................................................................................10-3
10-6 ROM Interface........................................................................................................10-4
10-7 Serial Interface......................................................................................................10-5
10-8 External Circuitry for 8-Bit Boot ROM................................................................10-5
10-9 8-Bit Boot ROM Timing.........................................................................................10-6
10-10 Access Time Computation Diagram..................................................................10-6
10-11 Signal Relationships to CLKOUT......................................................................10-7
10-12 Signal Width Specifications................................................................................10-8
10-13 Skew between Two Outputs...............................................................................10-9
10-14 Circuitry for Interfacing 8-Bit Device to 16-Bit Memory in
Single-Address DMA Mode..............................................................................10-10
10-15 MC68340 Current vs. Activity at 5 V..................................................................10-11
10-16 MC68340 Current vs. Voltage/Temperature....................................................10-12
10-17 MC68340 Current vs. Clock Frequency at 5 V................................................10-12
11-1 Drive Levels and Test Points for AC Specifications.......................................11-4
11-2 Read Cycle Timing Diagram...............................................................................11-11
11-3 Write Cycle Timing Diagram...............................................................................11-12
11-4 Fast Termination Read Cycle Timing Diagram ...............................................11-13
11-5 Fast Termination Write Cycle Timing Diagram................................................11-14
11-6 Bus Arbitation Timing—Active Bus Case .........................................................11-15
11-7 Bus Arbitration Timing—Idle Bus Case............................................................11-16
11-8 Show Cycle Timing Diagram..............................................................................11-16
11-9 IACK Cycle Timing Diagram...............................................................................11-17
11-10 Background Debug Mode Serial Port Timing.................................................11-18
11-11 Background Debug Mode FREEZE Timing .....................................................11-18
11-12 DMA Signal Timing Diagram..............................................................................11-19
11-13 Timer Module Clock Signal Timing Diagram ..................................................11-20
11-14 Timer Module Signal Timing Diagram..............................................................11-21
11-15 Serial Module General Timing Diagram ..........................................................11-22
xx
MC68340 USER'S MANUAL
MOTOROLA
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