Freescale Semiconductor, Inc.
Multiple Serial Interface
Serial Communication Interface (SCI)
MCLK
DIVIDER
BAUD RATE
CLOCK
SCI TRANSMITTER
MSB
LSB
10-11 Bit SHIFT REG
PARITY
GENERATOR
Rx Baud Rate
Tx Baud Rate
TxD BUFFER/SCxDRL
SCxBD/SELECT
S
TxD
P
S
SCxCR1/SCI CTL 1
R
TxMTR CONTROL
SCxCR2/SCI CTL 2
D
/
L
DATA BUS
O
T
SCxSR1/INT STATUS
INT REQUEST LOGIC
RxD
SCI RECEIVER
TO
INTERNAL
LOGIC
PARITY
DETECT
DATA RECOVERY
MSB
LSB
10-11 BIT SHIFT REG
TxD BUFFER/SCxDRL
SCxCR1/SCI CTL 1
WAKE-UP LOGIC
SCxSR1/INT STATUS
SCxCR2/SCI CTL 2
INT REQUEST LOGIC
Figure 14-2. Serial Communications Interface Block Diagram
MC68HC912DG128 — Rev 3.0
Technical Data
Multiple Serial Interface
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