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68HC908RFRK2 参数 Datasheet PDF下载

68HC908RFRK2图片预览
型号: 68HC908RFRK2
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 [Advance Information]
分类和应用:
文件页数/大小: 250 页 / 2075 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Keyboard/External Interrupt Module (KBI)  
14.4.2 IRQ1 Pin  
A logic 0 on the IRQ1 pin can latch an interrupt request into the IRQ1  
latch. A vector fetch, software clear, or reset clears the IRQ1 latch. If the  
MODEI bit is set, the IRQ1 pin is both falling-edge sensitive and low-  
level sensitive. With MODEI set, both of these actions must occur to  
clear the IRQ1 latch:  
Vector fetch or software clear — A vector fetch generates an  
interrupt acknowledge signal to clear the latch. Software may  
generate the interrupt acknowledge signal by writing a logic 1 to  
the ACKI bit in the IRQ and keyboard status and control register  
(INTKBSCR). The ACKI bit is useful in applications that poll the  
IRQ1 pin and require software to clear the IRQ1 latch. Writing to  
the ACKI bit can also prevent spurious interrupts due to noise.  
Setting ACKI does not affect subsequent transitions on the IRQ1  
pin. A falling edge on IRQ1 that occurs after writing to the ACKI bit  
latches another interrupt request. If the IRQ1 mask bit, IMASKI, is  
clear, the CPU loads the program counter with the vector address  
at locations $FFFA and $FFFB.  
Return of the IRQ1 pin to logic 1 — As long as the IRQ1 pin is at  
logic 0, the IRQ1 latch remains set.  
The vector fetch or software clear and the return of the IRQ1 pin to  
logic 1 can occur in any order. The interrupt request remains pending as  
long as the IRQ1 pin is at logic 0. A reset will clear the latch and the  
MODEI control bit, thereby clearing the interrupt even if the pin stays  
low.  
If the MODEI bit is clear, the IRQ1 pin is falling-edge sensitive only. With  
MODEI clear, a vector fetch or software clear immediately clears the  
IRQ1 latch.The IRQ1F bit in the INTKBSCR register can be used to  
check for pending interrupts. The IRQ1F bit is not affected by the  
IMASKI bit, which makes it useful in applications where polling is  
preferred.  
Use the BIH or BIL instruction to read the logic level on the IRQ1 pin.  
NOTE: When using the level-sensitive interrupt trigger, avoid false interrupts by  
masking interrupt requests in the interrupt routine.  
Advance Information  
188  
MC68HC908RFRK2  
MOTOROLA  
Keyboard/External Interrupt Module (KBI)  
For More Information On This Product,  
Go to: www.freescale.com  
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