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68HC705PL4B 参数 Datasheet PDF下载

68HC705PL4B图片预览
型号: 68HC705PL4B
PDF下载: 下载PDF文件 查看货源
内容描述: 工业标准的8位M68HC05 CPU核心 [Industry standard 8-bit M68HC05 CPU core]
分类和应用:
文件页数/大小: 98 页 / 1158 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
April 30, 1998  
GENERAL RELEASE SPECIFICATION  
7.3  
PORT B  
Port B is an 8-bit bidirectional port, with pins PB0-PB3 shared with keyboard inter-  
rupt functions. The Port B Data Register is at address $0001 and the Data Direc-  
tion Register is at address $0006.  
Pins PB0 to PB3 keyboard interrupt functions have individual enable and ag bits  
in registers $000B and $000C.  
7.4  
7.5  
PORT C  
Port C is an 8-bit bidirectional port. The Port C Data Register is at address $0002  
and the Data Direction Register is at address $0007. Port pins PC0 to PC3 are  
high current sink pins; see Electrical Speci cations section f or values.  
SUMMARY OF PORT A AND PORT B SHARED PINS  
Table 7-2 below shows a summary of port pins shared with other on-chip mod-  
ules.  
Table 7-2. Port A and Port B Shared Pins  
Port  
Port Pin  
Control  
Pin Name  
Shared Functions  
PA0 on MC68HC05PL4  
OSC2 on MC68HC05PL4B  
PA0  
PA0 or OSC2  
PA1  
PA2  
PA3  
DACEN  
TCAPEN  
TCMPEN  
PA1/DTMF  
PA2/TCAP  
PA3/TCMP  
DAC DTMF Output  
Port A  
Port B  
16-bit Timer Input Capture  
16-bit Timer Output Compare  
KBIE3-KBIE0  
PUL3-PUL0  
PB3-PB0  
PB3/KBI3-PB0/KBI0  
Keyboard Interrupt  
MC68HC05PL4  
REV 2.0  
INPUT/OUTPUT PORTS  
7-3  
For More Information On This Product,  
Go to: www.freescale.com