Freescale Semiconductor, Inc.
Pa ra lle l Inp ut/ Outp ut
7.4.7 PB5/ SDO Log ic
The PB5/SDO pin can be used as a simple I/O port pin or be controlled
by the SIOP serial interface as shown in Figure 7-10. The operations of
the PB5 pin are summarized in Table 7-3.
SERIAL DATA OUT (SDO)
V
DD
SERIAL ENABLE (SPE)
READ $0005
WRITE $0005
DATA DIRECTION
REGISTER B
BIT DDRB5
R
PORT B DATA
REGISTER
BIT PB5
PB5
SDO
WRITE $0001
READ $0001
WRITE $0011
PULLDOWN
REGISTER B
BIT PDIB5
PULLDOWN
DEVICE
R
RESET
MASK OPTION REGISTER ($1FF1)
Figure 7-10. PB5/SDO Pin I/O Circuit
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Parallel Input/Output
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