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68HC705SJ7 参数 Datasheet PDF下载

68HC705SJ7图片预览
型号: 68HC705SJ7
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Ana log Sub syste m  
8.7.1.2 Exte rna l Ab so lute Re fe re nc e  
If a stable external source is provided, the reference measurement point  
can be any one of the channel selected pins from PB1–PB4. In this case  
the reference reading can be taken by setting the MUX bit in the AMUX  
which connects channel selection bus to the pin connected to the  
external reference source. If the external reference is greater than  
V
–1.5 volts, then the DHOLD bit should be used to select the 1/2  
DD  
divided input.  
Table 8-6. Absolute Voltage Reading Errors  
Accuracy Improvements Possible  
Error Source  
In Hardware  
In Software  
Change in reference  
voltage  
Calibration and storage of reference source  
over temperature and supply voltage  
Provide closer tolerance reference  
Change in magnitude of  
ramp current source  
Compare unknown with recent  
measurement from reference  
Not adjustable  
Non-linearity of ramp  
current source vs.  
voltage  
Calibration and storage of voltages at 1/4,  
1/2, 3/4, and FS  
Not adjustable  
Change in magnitude of  
ramp capacitor  
Compare unknown with recent  
measurement from reference  
Provide closer tolerance ramp capacitor  
Use external oscillator with crystal  
Frequency shift in  
internal low-power  
oscillator  
Compare unknown with recent  
measurement from reference  
Frequency shift in  
external oscillator  
Compare unknown with recent  
measurement from reference  
Provide closer tolerance crystal  
Use faster conversion times  
Sampling capacitor  
leakage  
Compare unknown with recent  
measurement from reference  
Compare unknown with recent  
measurement from reference OR avoid  
use of divided input  
Internal voltage divider  
ratio  
Not adjustable  
Not adjustable  
Sum two readings on reference or  
unknown using INV and INV control bit  
and divide by 2 (average of both)  
Input offset voltage of  
comparator 2  
Close decoupling at V and V pins  
and reduce supply source impedance  
Average multiple readings on both the  
reference and the unknown voltage  
DD  
SS  
Noise internal to MCU  
Noise external to MCU  
Close decoupling of power supply, low  
source impedances, good board  
layout, use of multi-layer board  
Average multiple readings on both the  
reference and the unknown voltage  
General Release Specification  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
Analog Subsystem  
For More Information On This Product,  
Go to: www.freescale.com