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68HC705JJ7_1 参数 Datasheet PDF下载

68HC705JJ7_1图片预览
型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Interrupts  
External Interrupts  
NOTE: If the port A pins are enabled as external interrupts, then a high level on  
any PA0:3 pin will drive the state of the IRQ function such that the  
IRQ/V pin and other PA0:3 pins to be ignored until ALL of the PA0:3  
PP  
pins have returned to a low level. Similarly, if the IRQ/V pin is at a low  
PP  
level, the PA0:3 pins will be ignored until the IRQ/V pin returns to a  
PP  
high state.  
4.6.3 IRQ Sta tus a nd Control Re g iste r (ISCR)  
The IRQ status and control register (ISCR), shown in Figure 4-4,  
contains an external interrupt mask (IRQE), an external interrupt flag  
(IRQF), and a flag reset bit (IRQR). Unused bits will read as logic zeros.  
The ISCR also contains two control bits for the oscillators, external pin  
oscillator, and internal low-power oscillator. Reset sets the IRQE and  
OM2 bits; and clears all the other bits.  
$000D  
Read:  
Write:  
Reset:  
Bit 7  
IRQE  
1
6
OM2  
1
5
OM1  
0
4
0
3
2
0
1
0
Bit 0  
0
IRQF  
R
0
IRQR  
U
0
0
0
= Unimplemented  
R
= Reserved  
U = Unaffected  
Figure 4-4. IRQ Status and Control Register (ISCR)  
IRQE — External Interrupt Request Enable  
This read/write bit enables external interrupts. Reset sets the IRQE  
bit.  
1 = External interrupt processing enabled  
0 = External interrupt processing disabled  
OM1 and OM2 — Oscillator Selects  
These bits control the selection and enabling of the oscillator source  
for the MCU. One choice is the internal low-power oscillator (LPO).  
The other choice is the external pin oscillator (EPO) which is common  
to most MC68HC05 MCU devices. The EPO uses external  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
General Release Specification  
Interrupts  
For More Information On This Product,  
Go to: www.freescale.com  
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