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68HC705JJ7_1 参数 Datasheet PDF下载

68HC705JJ7_1图片预览
型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Electrical Specifications  
Supply Current Characteristics (V = 2.7 to 3.3 Vdc)  
DD  
15.7 Sup p ly Curre nt Cha ra c te ristic s (VDD = 2.7 to 3.3 Vd c )  
Characteristic  
RUN (Analog and LVR Disabled)  
Symbol  
Min  
Typ  
Max  
Unit  
Internal Low-Power Oscillator at 100 kHz  
Internal Low-Power Oscillator at 500 kHz  
External Oscillator Running at 2.1 MHz  
70  
320  
1.25  
320  
800  
2.60  
µA  
µA  
mA  
I
I
DD  
DD  
WAIT (Analog and LVR Disabled)  
Internal Low-Power Oscillator at 100 kHz  
Internal Low-Power Oscillator at 500 kHz  
External Oscillator Running at 2.1 MHz  
20  
40  
0.50  
65  
250  
1.10  
µA  
µA  
mA  
STOP (Analog and LVR Disabled)  
25 °C  
–40 °C to 85 °C  
I
I
1
2
5
10  
µA  
µA  
DD  
DD  
Incremental I for Enabled Modules  
DD  
LVR  
5
380  
15  
475  
µA  
µA  
Analog Subsystem  
NOTES:  
1.  
VDD = 4.5 to 5.5 Vdc, VSS = 0 V, TL TA TH, unless otherwise noted  
2. All values shown reflect average measurements.  
3. Typical values at midpoint of voltage range, 25 °C only.  
4. Run (Operating) IDD, Wait IDD: Measured using external square wave clock source to OSC1 pin or internal oscillator,  
all inputs 0.2 Vdc from either supply rail (VDD or VSS); no dc loads, less than 50 pF on all outputs, CL = 20 pF on  
OSC2.  
5. Wait IDD is affected linearly by the OSC2 capacitance.  
6. Stop IDD: All ports configured as inputs, VIL = 0.2 Vdc, VIH = VDD –0.2 Vdc, OSC1 = VDD  
.
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
Electrical Specifications  
General Release Specification  
For More Information On This Product,  
Go to: www.freescale.com  
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