Freescale Semiconductor, Inc.
Pe rsona lity EPROM
12.3.2 PEPROM Sta tus a nd Control Re g iste r (PESCR)
The PEPROM status and control register (PESCR) controls the
PEPROM programming voltage. This register also transfers the
PEPROM bits to the internal data bus and contains a flag bit when row
zero is selected.
$000F
Bit 7
6
0
5
PEPGM
0
4
0
3
2
0
1
0
Bit 0
Read: PEDATA
Write:
0
PEPRZF
R
R
0
R
0
Reset:
U
0
0
0
1
= Unimplemented
R
= Reserved
U = Unaffected
Figure 12-3. PEPROM Status and Control Register (PESCR)
PEDATA — PEPROM Data
This read-only bit is the output state of the PEPROM sense amplifier
and shows the state of the currently selected bit. The state of the
PEDATA bit does not affect the programming of the bit selected by the
PEBSR. Reset does not affect the PEDATA bit.
1 = PEPROM data is a logic one
0 = PEPROM data is a logic zero
PEPGM — PEPROM Program Control
This read/write bit controls the switches that apply the programming
voltage from the IRQ/V pin to the selected PEPROM bit cell. When
PP
the PEPGM bit is set the selected bit cell will be programmed to a
logical one, regardless of the state of the PEDATA bit. Reset clears
the PEPGM bit.
1 = Programming voltage applied to array bit
0 = Programming voltage not applied to array bit
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Personality EPROM
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