Freescale Semiconductor, Inc.
Sim p le Se ria l Inte rfa c e
PORTB LOGIC
PORTB LOGIC
OSCILL
CLOCK
÷2
CLOCK
CLOCK
DIVIDER
SPR0
SPR1
CPHA
MSTR
CONTROL
AND
PB7
SCK
SELECT
SI O P
SPE
(
LSBF
SPIR
SPIE
C
PB6
SDI
PORTB LOGIC
$000A
DIN
DOUT
CLK
LATCH
SIOP
INTERRUPT
8-BIT SHIFT
REGISTER
COMP
Q
S
ERROR
PB5
SDO
SPIF
R
DCOL
FORMAT CONTROL
(LSB OR MSB FIRST)
$000B
SIOP
DATA REGISTER
(SDR)
$000C
INTERNAL HC05 BUS
Figure 9-1. SIOP Block Diagram
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Simple Serial Interface
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