Freescale Semiconductor, Inc.
Ana log Sub syste m
Table 8-2. Channel Select Bus Combinations
Analog Multiplex Register
VREF MUX4 MUX3 MUX2 MUX1
Channel Select Bus Connected to:
PB4/AN4/
PB3/AN3/
V
V
SS
PB2/AN2
PB1/AN1
DD
TCMP
TCAP
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
—
—
—
—
—
—
On
—
On
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
On
—
—
—
—
On
On
—
—
—
On
—
—
On
On
On
On
—
—
—
On
—
—
On
On
—
—
On
—
On
On
On
On
On
On
On
On
—
—
—
On
—
—
On
On
—
—
On
—
On
On
On
On
—
—
On
—
On
On
—
On
—
X = Don’t care
— = High impedance
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Analog Subsystem
For More Information On This Product,
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