Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
TABLE OF CONTENTS
Section
Title
SECTION 1
GENERAL DESCRIPTION
1.1
1.2
1.3
1.4
1.5
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
1.5.7
1.5.8
1.5.9
1.6
Features .......................................................................................................... 1-1
Mask Options .................................................................................................. 1-2
MCU Structure ................................................................................................ 1-3
Pin Assignments ............................................................................................. 1-4
Signal Description ........................................................................................... 1-4
V
DD
AND V
SS
............................................................................................. 1-4
IRQ ............................................................................................................. 1-4
OSC1 and OSC2 .......................................................................................... -5
RESET ........................................................................................................ 1-5
TCMP .......................................................................................................... 1-5
PA0 through PA7 ........................................................................................ 1-5
SDO/PB5, SDI/PB6, and SCK/PB7 ............................................................ 1-6
PC0 through PC7 ........................................................................................ 1-6
PD5 and TCAP/PD7 ................................................................................... 1-6
Input/Output Programming .............................................................................. 1-6
SECTION 2
MEMORY
2.1
2.2
2.3
ROM ................................................................................................................ 2-3
ROM Security Feature .................................................................................... 2-3
RAM ................................................................................................................ 2-3
SECTION 3
CENTRAL PROCESSING UNIT
3.1
Accumulator (A) .............................................................................................. 3-1
Page
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