Freescale Semiconductor, Inc.
Ge ne ra l Re le a se Sp e c ific a tion — MC68HC05CT4
Se c tion 8. 16-Bit Tim e r
8.1 Conte nts
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
Counter Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Output Compare Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Input Capture Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
Timer Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
Timer Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
Timer During Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
Timer During Stop Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
8.10 Timer Power Supply Source. . . . . . . . . . . . . . . . . . . . . . . . . . .67
8.2 Introd uc tion
The timer consists of a 16-bit, free-running counter driven by a fixed
divide-by-four prescaler. This timer can be used for many purposes,
including input waveform measurements, while simultaneously
generating an output waveform. Pulse widths can vary from several
microseconds to many seconds.
Because the timer has a 16-bit architecture, each specific functional
segment (capability) is represented by two registers. These registers
contain the high and low byte of that functional segment. Access to the
high byte inhibits that specific timer function until the low byte is also
accessed.
NOTE: The I bit in the CCR should be set while manipulating both the high and
low byte registers of a specific timer function to ensure that an interrupt
does not occur.
MC68HC05CT4 — Rev. 2.0
General Release Specification
16-Bit Timer
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