Clock sources
DSP56800EX Core
Program Control Unit
ALU1
ALU2
Address
Generation
Unit
PC
LA
LA2
HWS0
HWS1
FIRA
Instruction
Decoder
R0
R1
(AGU)
R2
R2
Interrupt
Unit
Program
Memory
M01
N3
R3
R3
OMR
R4
R4
SR
LC
LC2
R5
R5
Looping
Unit
N
SP
FISR
XAB1
XAB2
PAB
Data/
Program
RAM
PDB
CDBW
CDBR
XDB2
A2
B2
C2
D2
A1
B1
C1
D1
Y1
Y0
X0
A0
B0
C0
D0
Bit-
Manipulation
Unit
IPBus
Interface
Data
Y
Enhanced
OnCE™
Arithmetic
Logic Unit
(ALU)
JTAG TAP
MAC and ALU Multi-Bit Shifter
Figure 1. 56800EX Basic Block Diagram
MC56F844xx Advance Information Data Sheet, Rev. 2, 06/2012.
14
Freescale Semiconductor, Inc.
Preliminary
General Business Information
FREESCALE [ Freescale ]
