Table 8-3 GPIO External Signals Map (Continued)
Pins in shaded rows are not available in 56F8366/56F8166
Pins in italics are NOT available in the 56F8166 device
Reset
Function
Functional Signal
Package PIn
GPIO Port
GPIO Bit
0
1
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
D7
D8
28
29
2
D9
30
3
D10
D11
D12
D13
D14
D15
D0
32
4
133
134
135
136
137
59
5
6
7
GPIOF
8
9
10
11
12
13
14
15
D1
60
D2
72
D3
75
D4
76
D5
77
D6
78
1. See Part 6.5.8 to determine how to select peripherals from this set; DEC1 is the selected peripheral at reset.
Part 9 Joint Test Action Group (JTAG)
9.1 JTAG Information
Please contact your Freescale marketing representative or authorized distributor for
device/package-specific BSDL information.
56F8366 Technical Data, Rev. 6
142
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
