56F8355 Information
Table 8-3 GPIO External Signals Map (Continued)
Pins in shaded rows are not available in 56F8355 / 56F8155
Pins in italics are NOT available in the 56F8155 device
Reset Function
Peripheral
Functional Signal
Package Pin #
GPIO Port
GPIO Bit
D71
D81
0
1
2
3
22
23
24
26
Peripheral
D91
Peripheral
D101
Peripheral
4
5
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
6
7
GPIOF
8
9
10
11
12
13
14
15
1. Not useful in reset configuration in this package - reconfigure as GPIO
2. See Part 6.5.8 to determine how to select peripherals from this set; DEC1 is the selected peripheral at reset
Part 9 Joint Test Action Group (JTAG)
9.1 56F8355 Information
Please contact your Freescale marketing representative or authorized distributor for
device/package-specific BSDL information.
Part 10 Specifications
10.1 General Characteristics
The 56F8355/56F8155 are fabricated in high-density CMOS with 5V-tolerant TTL-compatible digital
inputs. The term “5V-tolerant” refers to the capability of an I/O pin, built on a 3.3V-compatible process
technology, to withstand a voltage up to 5.5V without damaging the device. Many systems have a mixture
56F8355 Technical Data, Rev. 12
Freescale Semiconductor
Preliminary
129
FREESCALE [ Freescale ]
