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56F8345 参数 Datasheet PDF下载

56F8345图片预览
型号: 56F8345
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 164 页 / 2236 K
品牌: FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
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56F8345/56F8145 General Description
Note:
Features in italics are NOT available in the 56F8145 device.
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• 128KB Program Flash
• 4KB Program RAM
• 8KB Data Flash
• 8KB Data RAM
• 8KB Boot Flash
• Up to two
6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
Up to two
Quadrature Decoders
• FlexCAN module
• Optional On-Chip Regulator
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interface (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP)/Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 49 GPIO lines
• 128-pin LQFP Package
RSTO
RESET
6
PWM Outputs
3
4
Current Sense Inputs
or
GPIOC
Fault Inputs
Program Controller
and Hardware
Looping Unit
5
JTAG/
EOnCE
Port
V
PP
2
V
CAP
4
OCR_DIS
V
DD
V
SS
7
5
Digital Reg
V
DDA
2
V
SSA
PWMA
Analog Reg
16-Bit
56800E Core
Low Voltage
Supervisor
Bit
Manipulation
Unit
6
PWM Outputs
3
4
4
4
5
4
4
Current Sense Inputs
or GPIOD
Fault Inputs
PWMB
Address
Generation Unit
Data ALU
16 x 16 + 36 -->36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
AD0
AD1
VREF
PAB
PDB
CDBR
CDBW
ADCA
Memory
Program Memory
64K x 16 Flash
2K x 16 RAM
4K x 16 Boot
Flash
Data Memory
4K x 16 Flash
4K x 16 RAM
XDB2
XAB1
XAB2
PDB
CDBR
CDBW
R/W Control
AD0
ADCB
AD1
TEMP_SENSE
4
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
Quadrature
Decoder 1 or
Quad
Timer B or
SP1I or
GPIOC
Quad Timer
C or GPIOE
Quad Timer
D or
GPIOE
FlexCAN
System Bus
Control
External Bus
Interface Unit
PAB
*
External
Address Bus
Switch
*
External
Data
Bus Switch
*
Bus
Control
6
5
A8-13 or GPIOA0-5
GPIOB0-4 or A16-20
4
D7-10 or GPIOF0-3
6
GPIOD0-5 or CS2-7
4
IPBus Bridge (IPBB)
Peripheral
Device Selects
2
4
2
Decoding
Peripherals
RW
Control
IPAB
IPWDB
IPRDB
Clock
resets
P
System
O
Integration
R
Module
PLL
*
EMI not functional in
this package; use as
GPIO pins
SPI0 or
GPIOE
4
SCI1 or
GPIOD
2
SCI0 or
GPIOE
2
COP/
Interrupt
Watchdog Controller
O
Clock
S
Generator
C
XTAL
EXTAL
IRQA IRQB
CLKO
CLKMODE
56F8345/56F8145 Block Diagram - 128 LQFP
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
Preliminary
5