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56F8027 参数 Datasheet PDF下载

56F8027图片预览
型号: 56F8027
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 181 页 / 957 K
品牌: FREESCALE [ Freescale ]
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Part 9 Joint Test Action Group (JTAG)  
9.1 56F8037/56F8027 Information  
Please contact your Freescale sales representative or authorized distributor for device/package-specific  
BSDL information.  
The TRST pin is not available in this package. The pin is tied to V in the package.  
DD  
The JTAG state machine is reset during POR and can also be reset via a soft reset by holding TMS high  
for five rising edges of TCK, as described in the 56F802x and 56F803x Peripheral Reference Manual.  
Part 10 Specifications  
10.1 General Characteristics  
The 56F8037/56F8027 is fabricated in high-density CMOS with 5V-tolerant TTL-compatible digital  
inputs. The term “5V-tolerant” refers to the capability of an I/O pin, built on a 3.3V-compatible process  
technology, to withstand a voltage up to 5.5V without damaging the device. Many systems have a mixture  
of devices designed for 3.3V and 5V power supplies. In such systems, a bus may carry both 3.3V- and  
5V-compatible I/O voltage levels (a standard 3.3V I/O is designed to receive a maximum voltage of 3.3V  
10% during normal operation without causing damage). This 5V-tolerant capability therefore offers the  
power savings of 3.3V I/O levels, combined with the ability to receive 5V levels without damage.  
Absolute maximum ratings in Table 10-1 are stress ratings only, and functional operation at the maximum  
is not guaranteed. Stress beyond these ratings may affect device reliability or cause permanent damage to  
the device.  
Unless otherwise stated, all specifications within this chapter apply over the temperature range of -40ºC to  
125ºC ambient temperature over the following supply ranges:  
V
= V  
= 0V, V = V  
= 3.0–3.6V, CL < 50pF, f = 32MHz  
SS  
SSA  
DD  
DDA  
OP  
CAUTION  
This device contains protective circuitry to guard  
against damage due to high static voltage or electrical  
fields. However, normal precautions are advised to  
avoid application of any voltages higher than  
maximum-rated voltages to this high-impedance circuit.  
Reliability of operation is enhanced if unused inputs are  
tied to an appropriate logic voltage level (either VDD or  
VSS).  
56F8037/56F8027 Data Sheet, Rev. 6  
140  
FreescaleSemiconductor