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56F8037_07 参数 Datasheet PDF下载

56F8037_07图片预览
型号: 56F8037_07
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 180 页 / 2864 K
品牌: FREESCALE [ Freescale ]
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56F8037 Signal Pins  
Table 2-3 56F8037 Signal and Package Information for the 64-Pin LQFP (Continued)  
Signal  
Name  
LQFP  
Pin No.  
StateDuring  
Reset  
Type  
Signal Description  
GPIOD5  
(XTAL)  
52  
Input/  
Output  
Input  
Port D GPIO — This GPIO pin can be individually programmed as  
an input or output pin.  
Analog  
Input/  
External Crystal Oscillator Output — This output connects the  
internal crystal oscillator output to an external crystal.  
Output  
(CLKIN)  
Input  
External Clock Input — This pin serves as an external clock input.  
After reset, the default state is GPIOD5.  
GPIOD6  
(DAC0)  
18  
15  
59  
Input/  
Output  
Input,  
internal  
pull-up  
enabled  
Port D GPIO — This GPIO pin can be individually programmed as  
an input or output pin.  
Analog  
Input  
DAC0— Digital-to-Analog Converter output 0.  
After reset, the default state is GPIOD6.  
GPIOD7  
(DAC1)  
Input/  
Output  
Input,  
internal  
pull-up  
enabled  
Port D GPIO — This GPIO pin can be individually programmed as  
an input or output pin.  
Analog  
Input  
DAC1— Digital-to-Analog Converter output 1.  
After reset, the default state is GPIOD7.  
TDI  
Input  
Input,  
internal  
pull-up  
enabled  
Test Data Input — This input pin provides a serial input data stream  
to the JTAG/EOnCE port. It is sampled on the rising edge of TCK  
and has an on-chip pull-up resistor.  
(GPIOD0)  
Input/  
Port D GPIO — This GPIO pin can be individually programmed as  
Output  
an input or output pin.  
After reset, the default state is TDI.  
TDO  
64  
Output  
Output  
Test Data Output — This tri-stateable output pin provides a serial  
tri-stated, output data stream from the JTAG/EOnCE port. It is driven in the  
internal  
pull-up  
shift-IR and shift-DR controller states, and changes on the falling  
edge of TCK.  
enabled  
(GPIOD1)  
Input/  
Port D GPIO — This GPIO pin can be individually programmed as  
Output  
an input or output pin.  
After reset, the default state is TDO.  
Return to Table 2-2  
56F8037 Data Sheet, Rev. 3  
Freescale Semiconductor  
Preliminary  
37  
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