56F8014 Features
•
•
•
— Each complementary PWM signal pair can output a different switching frequency by selecting
PWM generation sources from:
– PWM generator
– External GPIO
– Internal timers
– ADC conversion result of over/under limits:
When conversion result is greater than high limit, deactivate PWM signal
When conversion result is less than low limit, activate PWM signal
Two independent 12-bit Analog-to-Digital Converters (ADCs)
— 2 x 4 channel inputs
— Supports both simultaneous and sequential conversions
— ADC conversions can be synchronized by both PWM and timer modules
— Sampling rate up to 2.67MSPS
— 8-word result buffer registers
— ADC Smart Power Management (Auto-standby, auto-powerdown)
One 16-bit multi-purpose Quad Timer module (TMR)
— Up to 96MHz operating clock
— Four independent 16-bit counter/timers with cascading capability
— Each timer has capture and compare capability
— Up to 12 operating modes
One Serial Communication Interface (SCI) with LIN slave functionality
— Full-duplex or single-wire operation
— Two receiver wake-up methods:
– Idle line
– Address mark
One Serial Peripheral Interface (SPI)
— Full-duplex operation
— Master and slave modes
— Programmable length transactions (two to sixteen bits)
One Inter-Integrated Circuit (I
2
C) port
— Operates up to 400 kbps
— Supports both master and slave operation
Computer Operating Properly (COP)/Watchdog timer capable of selecting different clock sources
Up to 26 General-Purpose I/O (GPIO) pins with 5V tolerance
Integrated Power-On Reset and Low-Voltage Interrupt Module
Phase Lock Loop (PLL) provides a high-speed clock to the core and peripherals
Clock Sources:
— On-chip relaxation oscillator
•
•
•
•
•
•
•
56F8014 Technical Data, Rev. 11
Freescale Semiconductor
7
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
