56858 Description
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Six (6) independent channels of DMA
8-bit Parallel Host Interface*
Time-of-Day (TOD)
Up to 47 GPIO
* Each peripheral I/O can be used alternately as a GPIO if not needed
1.1.4
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Energy Information
Fabricated in high-density CMOS with 3.3V, TTL-compatible digital inputs
Wait and Stop modes available
1.2 56858 Description
The 56858 is a member of the 56800E core-based family of controllers. This device combines the
processing power of a Digital Signal Processor (DSP) and the functionality of a microcontroller with a
flexible set of peripherals on a single chip to create an extremely cost-effective solution. The low cost,
flexibility, and compact program code make this device well-suited for many applications. The 56858
includes peripherals that are especially useful for teledatacom devices; Internet appliances; portable
devices; TAD; voice recognition; hands-free devices; and general purpose applications.
The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming
model and optimized instruction set allow straightforward generation of efficient, compact DSP and
control code. The instruction set is also highly efficient for C Compilers, enabling rapid development of
optimized control applications.
The 56858 supports program execution from either internal or external memories. Two data operands can
be accessed from the on-chip Data RAM per instruction cycle. The 56858 also provides two external
dedicated interrupt lines, and up to 47 General Purpose Input/Output (GPIO) lines, depending on
peripheral configuration.
The 56858 controller includes 40K words of Program RAM, 24K words of Data RAM and 1K of Boot
RAM. It also supports program execution from external memory.
This controller also provides a full set of standard programmable peripherals that include an 8-bit Parallel
Host Interface, two Enhanced Synchronous Serial Interfaces (ESSI), one Serial Peripheral Interface (SPI),
two Serial Communications Interfaces (SCI), and one Quad Timer. The Host Interface, Quad Timer, SSI,
SPI, SCI I/O and four chip selects can be used as General Purpose Input/Outputs when its primary function
is not required.
1.3 State of the Art Development Environment
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Processor Expert
TM
(PE) provides a Rapid Application Design (RAD) tool that combines easy-to-use
component-based software application creation with an expert knowledge system.
The Code Warrior Integrated Development Environment is a sophisticated tool for code navigation,
compiling, and debugging. A complete set of evaluation modules (EVMs) and development system cards
will support concurrent engineering. Together, PE, Code Warrior and EVMs create a complete, scalable
tools solution for easy, fast, and efficient development.
56858 Technical Data, Rev. 6
Freescale Semiconductor
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FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
