FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
MC34844 - Functional Block Diagram
Regulators / Power Down
Boost
3 Internal Regulators
Protection / Failure Detection
Over-temperature Protection
Under-voltage Protection
Over-voltage Protection
LED Channels
LED Open Protection
Logic Control
Optical and Temperature Control
PWM Dimming
Serial Interface Control
Regulator / Power down
Protection / Failure Detection
Boost
Logic Control
Figure 4. Functional Internal Block Diagram
• SM Bus mode, EN pin must be tied low and the device is
REGULATORS/ POWER DOWN
turned ON by any activity on the bus lines. The part shuts
down if the bus lines are held low for more than 27 ms, the
27 ms watchdog timer can be disabled by I2C (setting
SETI2C bit high) or tying the EN pin high. In Sleep mode
(EN bit=0) the device reduces the power consumption by
leaving “alive” only the blocks required for I2C
The 34844 is designed to operate from input voltages in
the 7.0 to 28 V range. This is stepped down internally by
LDOs to 2.5 V (VDC1 and VDC3) and 6 V (VDC3) for
powering internal circuitry. If the input voltage falls below the
UVLO threshold, the device automatically enters in power
down mode.
communication.
Operating Modes:
• I2C mode, has to be configured by I2C communication
(SETI2C bit = 1) right after the IC is turned ON, it prevents
the part from being turned ON/OFF by the bus. Sleep
mode is also present and it is intended to save power, but
still keep the IC prepared to communicate by I2C. Turning
the EN pin OFF, the chip enters into a low power mode.
The device can be operated by the EN pin and/or SDA/
SCK bus lines, resulting in three distinct operation modes:
• Manual mode, there is no I2C capability, the bus line pins
must be tied low, and the EN pin controls the ON/OFF
operation.
34844
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
FREESCALE [ Freescale ]
