Pin Connections
Table 3. Pin Definitions (continued)
Pin
Rating
[V]
Pin Number
Pin Name
# Balls
Definition
Function
Ground for Regulator 4A
Regulator 4B input
P3
GNDSW4A
SW4BIN
GND
-
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
P5
I
5.5
5.5
3.6
-
Regulator 4B switch node connection
Regulator 4B feedback
R6
SW4BLX
SW4BFB
GNDSW4B
SW4CFG
SW5IN
O
P2
I
Ground for Regulator 4B
Regulator 4A/B mode configuration
Regulator 5 input
P6
GND
M6
I
3.6
5.5
5.5
3.6
-
P7
I
Regulator 5 output
R8
SW5LX
O
Regulator 5 feedback
M8
SW5FB
I
GND
GND
I
Ground for Regulator 5
P8
GNDSW5
GNDREF1
SWBSTIN
SWBSTLX
SWBSTFB
GNDSWBST
Ground reference for regulators
Boost Regulator BP supply
SWBST switch node connection
Boost Regulator feedback
Ground for regulator boost
N9
-
F15
5.5
7.5
5.5
-
G14
O
H15
I
F14
GND
LDO Regulators
VREFDDR input supply
J14
K15
J15
L15
K14
N14
P15
N15
D2
VINREFDDR
VREFDDR
VHALF
I
3.6
1.5
1.5
5.5
2.5
5.5
3.6
5.5
3.6
5.5
-
1
1
1
1
1
1
1
1
1
1
1
VREFDDR regulator output
O
Half supply reference for VREFDDR
VPLL input supply
O
VINPLL
I
VPLL regulator output
VPLL
O
Drive output for VDAC regulator using an external PNP device
VDAC regulator output
VDACDRV
VDAC
O
O
Supply pin for VUSB2, VDAC, and VGEN2
USB transceiver regulator output
VUSB input supply
LDOVDD
VUSB
I
O
D1
VINUSB
GNDUSB
I
Ground for VUSB LDO
C1
GND
1. VUSB2 input using internal PMOS FET
2. Drive output for VUSB2 regulator using an external PNP device
VUSB2 regulator output
I
O
P14
VUSB2DRV
5.5
1
R14
H14
H12
VUSB2
VINGEN1
VGEN1
O
3.6
2.5
2.5
1
1
1
VGEN1 input supply
I
VGEN1 regulator output
O
1. VGEN2 input using internal PMOS FET
2. Drive output for VGEN2 regulator using an external PNP device
VGEN2 regulator output
I
L14
VGEN2DRV
5.5
1
O
M15
H2
VGEN2
VSRTC
O
3.6
2.5
-
1
1
1
Output regulator for SRTC module on processor
Ground for Regulator 1
O
M14
GNDREG1
GND
34709
Analog Integrated Circuit Device Data
9
Freescale Semiconductor
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