PIN CONNECTIONS
PIN CONNECTIONS
FREQ
INV
V
OUT
V
IN2
V
IN2
SW
SW
GND
GND
PGND
PGND
VBD
VBST
BOOT
SDA
SCL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CLKSYN
CLKSEL
RST
RT
EN2
EN1
ADDR
GND
GND
V
DD1
V
IN1
LDRV
CS
LDO
LFB
LCMP
Figure 3. Pin Connections
Table 1.
Pin Function Description
A functional description of each pin can be found in the
section beginning on
Pin
1
Pin Name
FREQ
Formal Name
Oscillator Frequency
Definition
This switcher frequency selection pin can be adjusted by connecting external
resistor R
F
to the FREQ pin. The default switching frequency (FREQ pin left open or
tied to V
DDI
) is set to 300 kHz.
Buck Controller Error Amplifier inverting input.
Output voltage of the buck converter. Input pin of the switching regulator power
sequence control circuit.
Buck regulator power input. Drain of the high-side power MOSFET.
Buck regulator switching node. This pin is connected to the inductor.
Analog ground of the IC, thermal heatsinking.
2
3
INV
VOUT
Inverting Input
Output Voltage
4, 5
6, 7
8, 9
24, 25
10, 11
12
13
VIN2
SW
GND
Input Voltage 2
Switch
Ground
PGND
VBD
VBST
Power Ground
Boost Drain
Boost Voltage
Buck regulator power ground.
Drain of the internal boost regulator power MOSFET.
Internal boost regulator output voltage. The internal boost regulator provides a
20 mA output current to supply the drive circuits for the integrated power MOSFETs
and the external N-channel power MOSFET of the linear regulator. The voltage at
the V
BST
pin is 7.75V nominal.
Bootstrap capacitor input.
I
2
C bus pin. Serial data.
I
2
C bus pin. Serial clock.
Linear regulator compensation pin.
Linear regulator feedback pin.
Input pin of the linear regulator power sequence control circuit.
14
15
16
17
18
19
BOOT
SDA
SCL
LCMP
LFB
LDO
Bootstrap
Serial Data
Serial Clock
Linear Compensation
Linear Feedback
Linear Regulator
34702
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
