INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VIN1
VIN
VDDI
Internal
Supply
8.0 V
VDDI
VDDI
VBST
Power
Enable
VDDI
Bandgap
Voltage
Reference
VDDI
VLDO
Power
Sequencing
Reset
Q6
Reset
Control
POR
Timer
SysCon
INV
LFB
I
2
C
Control
Voltage Margining
VOUT
Watchdog Timer
Current Limit
VDDI
Buck
HS
and
LS
Driver
Q1
VIN2
(2)
VBST
BOOT
Power
Down
Power
Seq
UVLO
Q4
VDDI
Linear
Regulator
Control
ILim
LFB
LCMP
To Reset
Control
LDRV
CS
VBST
VBST
VBD
Q5
Boost
Control
VREF
VREF
EN1
EN2
RST
RT
C
Control
I
2
Thermal
Limit
ADDR
SDA
SCL
Switcher
Oscillator
300 kHz
Ramp
Gen.
I
2
C
Interface
PWM
Comp
Error
Amp
CLKSEL
CLKSYN FREQ
Figure 2. 34701 Simplified Internal Block Diagram
34701
2
+
VREF
-
LDO
VREF
VBST
SysCon
SoftSt
Buck
Control
Logic
SW
(2)
Q2
PGND
(2)
+
+
0.8 V
To Reset
Control
INV
VOUT
VOUT
Q3
-
-
Power
Seq
GND (4)
Analog Integrated Circuit Device Data
Freescale Semiconductor