INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VIN1
VIN
VDDI
Internal
VDDI
Supply
VDDI
8.0 V
VBST
VBST
VBST
Power
Enable
-
LDRV
CS
V
REF
+
To Reset
Control
VDDI
Linear
Regulator
Control
VDDI
VBD
Q5
LDO
Bandgap
Voltage
Reference
Boost
Control
V
REF
I
V
Lim
REF
V
REF
LFB
VDDI
LCMP
Power
Seq
VLDO
EN1
EN2
Q4
Power
Sequencing
Power
Down
UVLO
VBST
VBST
Voltage Margining
Watchdog Timer
Reset
RST
VOUT
Reset
Control
BOOT
Q6
SysCon
Current Limit
VDDI
POR
Timer
VIN2
(2)
INV
LFB
I2C
Control
RT
Buck
HS
Q1
I2C
Control
and
LS
Driver
SysCon
SoftSt
Thermal
Limit
Buck
Control
Logic
SW
(2)
Q2
ADDR
I2C
Interface
PGND
(2)
SDA
SCL
To Reset
Control
Error
Amp
PWM
Comp
0.8 V
Switcher
Oscillator
300 kHz
+
+
-
INV
-
VOUT
Ramp
Gen.
VOUT
Power
Seq
Q3
(4)
GND
CLKSEL
CLKSYN
FREQ
Figure 2. 34701 Simplified Internal Block Diagram
34701
Analog Integrated Circuit Device Data
Freescale Semiconductor
2