INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VPWR
V
IC
VDD
I
UP
Internal
Regulator
Over-voltage
Protection
CS
SO
SPI
3.0 MHz
Programmable
Switch Delay
0ms –525ms
Selectable Slew
Rate Gate Drive
SI
SCLK
FS
IN[0:1]
RST
WAKE
Selectable Over-current
High Detection
50A or 37.5A
Selectable Over-
current Low Detection
Blanking Time
0.15ms–155ms
Selectable Over-current
Low Detection
3.75A –12.5A
Open Load
Detection
I
DWN
R
DWN
Over-temperature
Detection
HS0
Logic
HS0
HS1
Programmable
Watchdog
310ms–2500ms
V
IC
I
UP
Selectable
Output Current
Recopy
1/10250 or 1/20500
HS1
FSI
GND
Figure 2. 33988 Simplified Internal Block Diagram
CSNS
33988
2
Analog Integrated Circuit Device Data
Freescale Semiconductor