INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VPWR
VDD
V
IC
Internal
Over-voltage
Protection
I
UP
Regulator
CS
SO
Programmable
Switch Delay
0–525 ms
Selectable Slew
Rate Gate Drive
SPI
3.0 MHz
HS0
Selectable Over-current
SI
SCLK
FS
High Detection
100A or 75A
IN[0:1]
RST
WAKE
Selectable Over-
current Low Detection
Blanking Time
Selectable Over-current
Low Detection
Logic
7.5 –25 A
0.15–155 ms
Open Load
Detection
Over-temperature
Detection
HS0
HS1
I
R
DWN
DWN
HS1
Programmable
Watchdog
V
IC
310–2500 ms
I
Selectable
UP
Output Current
Recopy
1/20500 or 1/41000
FSI
CSNS
GND
Figure 2. 33984 Simplified Internal Block Diagram
33984
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ Freescale ]
