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33937_09 参数 Datasheet PDF下载

33937_09图片预览
型号: 33937_09
PDF下载: 下载PDF文件 查看货源
内容描述: 三相场效应晶体管前置驱动器 [Three Phase Field Effect Transistor Pre-driver]
分类和应用: 晶体驱动器晶体管场效应晶体管
文件页数/大小: 48 页 / 734 K
品牌: FREESCALE [ Freescale ]
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FUNCTIONAL DEVICE OPERATION  
LOGIC COMMANDS AND REGISTERS  
the deadtime register. Until the next deadtime calibration is  
performed, 30 clock cycles will separate the turn off and turn  
on gate signals in the same phase. The worst case error  
immediately after calibration will be +0/-1 time base cycle, for  
this example +0 ns/-50 ns. Note that if the internal time base  
drifts, the effect on dead time will scale directly.  
DEADTIME COMMAND  
Deadtime prevents the turn-on of both transistors in the  
same phase until the deadtime has expired. The deadtime  
timer starts when a FET is commanded off (see Figure 6 and  
Figure 16). The deadtime control is disabled by enabling the  
FULLON mode.  
Sending a ZERO DEADTIME command (100x xxx0) sets  
the deadtime timer to 0. However, simultaneous turn-on of  
High Side and Low Side FETs in the same phase is still  
prevented unless the FULLON command has been  
transmitted. There is no calibration pulse expected after  
receiving the ZERO DEADTIME command.  
The deadtime is set by sending the DEADTIME command  
(100x xxx1), and then sending a calibration pulse of CS. This  
pulse must be 16 times longer than the required deadtime  
(see Figure 21). Deadtime is measured in cycle times of the  
internal time base, fTB. This measurement is divided by 16  
and stored in an internal register to provide the reference for  
timing the deadtime between high and low gate transactions  
in the same phase.  
After RESET, deadtime is set to the maximum value of 255  
time base cycles (typically 15 µs).  
The IC ignores any SPI data that is sent during the  
calibration pulse. If there are any transitions on SI or SCLK  
while the Deadtime CS pulse is low, a Framing Error will be  
generated, however, the CS pulse will be used to calibrate  
the deadtime  
For example: the internal time base is running at 20 MHz  
and a 1.5 µs deadtime is required. First a DEADTIME  
command is sent (using the SPI), then a CS is sent. The CS  
pulse is 16*1.5 = 24 µs wide. The IC measures this pulse as  
24000 ns/50 ns = 480 clock cycles and stores 480/16 = 30 in  
Table 14. .DEADTIME Command  
SPI Data Bits  
Write  
7
6
5
4
3
2
1
0
1
0
0
x
x
x
x
ZERO/  
CALIBRATE  
Reset  
x
x
x
x
Deadtime Calibration Pulse  
CS  
SCLK  
Deadtime  
Command  
SI  
SO  
Figure 21. Deadtime Calibration  
33937  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
36  
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