PIN CONNECTIONS
Table 1. 33931 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Description section beginning on
page 11.
Pin
41
Pin Name
CCP
Pin
Function
Analog
Output
Logic Input
Formal Name
Charge Pump
Capacitor
Input 2
Definition
External reservoir capacitor connection for the internal charge pump;
connected to VPWR. Allowable values are 30 nF to 100 nF.
Note:
This
capacitor is required for the proper performance of the device.
Logic input control of OUT2;e.g., when IN2 is logic HIGH, OUT2 is set to
VPWR, and when IN2 is logic LOW, OUT2 is set to PGND. (Schmitt trigger
Input with ~ 80
μA
source so default condition = OUT2 HIGH.)
Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1 is set to
VPWR, and when IN1 is logic LOW, OUT1 is set to PGND. (Schmitt trigger
Input with ~ 80
μA
source so default condition = OUT1 HIGH.)
Open drain active LOW Status Flag output (requires an external pull-up resistor
to V
DD
. Maximum permissible load current < 0.5 mA. Maximum V
CEsat
< 0.4 V
@
0.3 mA. Maximum permissible pull-up voltage < 7.0 V.)
The low-current analog signal ground must be connected to PGND via low-
impedance path (<10 mΩ, 0 Hz to 20 kHz). Exposed TAB is also the main
heatsinking path for the device.
Pin is not used
42
IN2
43
IN1
Logic Input
Input 1
44
SF
Logic
Output -
Open Drain
Status Flag
(Active Low)
TAB
AGND
Analog
Ground
None
Analog Signal
Ground
No Connect
12-33
N/C
33931
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
