PIN CONNECTIONS
PIN CONNECTIONS
AGND
VDD
VSENSE
NC*
NC
HS1
25
VS1
27
VS2
26
29
32
31
30
RXD
TXD
MISO
MOSI
SCLK
CS
ADOUT0
PWMIN
1
2
3
4
5
6
7
8
* Special Configuration Recommended /
Mandatory for Marked NC Pins
28
24
23
22
21
20
19
18
17
NC*
L1
L2
NC*
NC*
LS1
PGND
LS2
10
IRQ
11
12
13
14
15
16
LIN
LGND
NC*
NC*
RST
Figure 3. 33911 Pin Connections
Table 1. 33911 Pin Definitions
A functional description of each pin can be found in the
section beginning on
Pin
1
2
3
4
5
6
7
8
9
10
Pin Name
RXD
TXD
MISO
MOSI
SCLK
CS
ADOUT0
PWMIN
RST
IRQ
Formal Name
Receiver Output
Transmitter Input
SPI Output
SPI Input
SPI Clock
SPI Chip Select
Analog Output Pin 0
PWM Input
Internal Reset I/O
Internal Interrupt
Output
Definition
This pin is the receiver output of the LIN interface which reports the state of
the bus voltage to the MCU interface.
This pin is the transmitter input of the LIN interface which controls the state of
the bus output.
SPI (Serial Peripheral Interface) data output. When CS is high, pin is in the
high-impedance state.
SPI (Serial Peripheral Interface) data input.
SPI (Serial Peripheral Interface) clock Input.
SPI (Serial Peripheral Interface) chip select input pin. CS is active low.
Analog Multiplexer Output.
High side and low side pulse-width modulation input.
Bidirectional reset I/O pin - driven low when any internal reset source is
asserted. RST is active low.
Interrupt output pin, indicating wake-up events from Stop Mode or events from
Normal and Normal Request Modes. IRQ is active low.
WDCONF
NC*
9
33911
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
