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33910_10 参数 Datasheet PDF下载

33910_10图片预览
型号: 33910_10
PDF下载: 下载PDF文件 查看货源
内容描述: LIN系统基础芯片,高 [LIN System Basis Chip with High]
分类和应用:
文件页数/大小: 90 页 / 1134 K
品牌: FREESCALE [ Freescale ]
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MC33910G5AC/MC3433910G5AC  
FUNCTIONAL DEVICE OPERATIONS  
OPERATIONAL MODES  
the LIN Status Register (LINSR) is set and the transmitter is  
shut down.  
LIN Receiver Operation Only  
While in Normal mode, the activation of the RXONLY bit  
disables the LIN TXD driver. In case of a LIN error condition,  
this bit is automatically set. If Stop mode is selected with this  
bit set, the LIN wake-up functionality is disabled and the RXD  
pin will reflect the state of the LIN bus.  
If the LINM bit is set in the Interrupt Mask Register (IMR),  
an Interrupt IRQ will be generated.  
The transmitter is automatically re-enabled once the  
condition is gone (transition on RXD) and TXD is high.  
A read of the LIN Status Register (LINSR) without the RXD  
pin short-circuit condition will clear the bit RXSHORT.  
STOP Mode And Wake-up Feature  
During Stop mode operation, the transmitter of the  
physical layer is disabled. The receiver is still active and able  
to detect wake-up events on the LIN bus line.  
TXD Dominant Detection (LIN Interrupt)  
The LIN transceiver monitors the TXD input pin to detect a  
stuck in dominant (0 V) condition. In case of a stuck condition  
(TXD pin 0 V for more than 1 second (typ.)), the transmitter is  
shut down and the TXDOM bit in the LIN Status Register  
(LINSR) is set.  
A dominant level longer than TPROPWL followed by a rising  
edge will generate a wake-up interrupt, and will be reported  
in the Interrupt Source Register (ISR). Also see Figure 11.  
SLEEP Mode And Wake-up Feature  
If the LINM bit is set in the IMR, an Interrupt IRQ will be  
generated.  
During Sleep mode operation, the transmitter of the  
physical layer is disabled. The receiver must be active to  
detect wake-up events on the LIN bus line.  
The transmitter is automatically re-enabled once TXD is  
high.  
A dominant level longer than TPROPWL followed by a rising  
edge will generate a system wake-up (Reset), and will be  
reported in the Interrupt Source Register (ISR). Also see  
Figure 10.  
A read of the LIN Status Register (LINSR) with the TXD pin  
at 5.0 V will clear the bit TXDOM.  
33910  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
36  
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