PIN CONNECTIONS
PIN CONNECTIONS
PIN CONFIGURATION
TXD
GND
VDD
RXD
VIO
EN
INH
1
2
3
4
5
6
7
14
13
12
11
10
9
8
STBY
CANH
CANL
SPLIT
VSUP
WAKE
ERR
Figure 3. 33902 Pin Connections
Table 1. 33902 Pin Definitions
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Name
TXD
GND
VDD
RXD
VIO
EN
INH
ERR
WAKE
VSUP
SPLIT
CANL
CANH
STBY
Pin Function
Input
Output
Output
Output
Input
Input
Output
Output
Input
Input
Output
Input/output
Input/output
Input
Formal Name
Transmit data
Ground
Voltage Digital Drain
Receive data
Voltage supply for I/O
Enable
Inhibit
Active low Error
Wake
Voltage supply
Split
CAN LOW
CAN HIGH
Standby
Definition
CAN bus transmit data input pin
Ground termination
CAN dedicated internal voltage regulator, (decoupling capacitor required
for voltage stabilization)
CAN bus receive data output pin, wake-up flag in Low Power mode
Input supply for the digital input output pins
Enable input for device static mode control.
MOSI (Master Out, Slave In) during P_SPI operation.
Inhibit output for control of an external power supply regulator
Pin for static error and wake-up flag reporting
MISO (Master In, Slave Out) during P_SPI operation.
Wake input
Battery supply pin
Output for connection of the CAN bus termination middle point
CAN low pin
CAN high pin
Standby input for device static mode control.
CLK (Clock) during P_SPI operation.
33902
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
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