2
Internal Block Diagram
VPWR
VPPREF
VPPSENS
V
CC
V
CC
LOGIC CONTROL
Pre-
Regulator
POR,
Over-voltage
Under-voltage
V
PP
+5.0 V
Tracking
Regulator
+5.0 V
Regulator
RESETB
VPROT
VCC
CSB
SI
SCLK
SO
O2HIN
INJIN1
Watchdog
SPI INTERFACE
& REGISTERS
Typical of all 6 Driver Outputs
INJOUT1
INJOUT2
Gate Control
Current Limit
Temperature Limit
Short/Open
(1 of 6 shown)
PARALLEL
CONTROL
SPI Control
Parallel Control
V
PWR
VClamp
75 µA
ROUT1
ROUT2
INJIN2
IGNIN1
lLimit
+
–
R
S
LAMPOUT
TACHOUT
INJGND1
INJGND2
RGND1
RGND2
IGNIN2
RIN1
RIN2
MRX
V
CC
VAnalog
V10.0 Analog
V2.5 Logic
V
Logic
ISO9141
ISO9141
Bandgap
SLEEP/RUN
MTX
KEYSW
CONTROLLER
Bias
Pre-drivers
Ignition 1
START LOGIC
BATSW
To ROUT2
Driver
IGNFB1
IGNOUT1
IGNFB2
IGNOUT2
IGNSENSP
IGNSENSN
O2HFB
O2HOUT
O2HSENSP
O2HSENSN
Ignition 2
Oscillator
To Logic
Control
lLimit
+
–
O2 Heater
Divider
VCC
(SPI CONTROL)
To Logic
Control
–
+
lLimit
+
–
VRSP
VRSN
Divide by “N”
N=1-32
(SPI)
VRS CIRCUIT
To TACHOUT Driver
VRSOUT
Note: All current sinks and sources ~50µA
except where indicated
GND
Figure 2. Simplified Internal Block Diagram
33814
Analog Integrated Circuit Device Data
Freescale Semiconductor
4