PIN CONNECTIONS
PIN CONNECTIONS
REGOUT
TEST2
I/O0
I/O1
I/O2
AN0
AGND
AN1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
H_CAP
BUSIN
BUSOUT
RTNIN
RTNOUT
TOUT
IDDQ
TEST1
Figure 3. 33784 Pin Connections
Table 1. 33784 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
Pin Number
1
2
3
4
5
6, 8
7
9
10
11
12
13
14
15
16
Pin Name
REGOUT
TEST2
I/O0
I/O1
I/O2
AN0,AN1
AGND
TEST1
IDDQ
TOUT
RTNOUT
RTNIN
BUSOUT
BUSIN
H_CAP
Pin
Function
Output
Test
Input/Output
Formal Name
Regulator
Output
Test2
Logic I/O
Definition
Pin provides a regulated 5.0V output. The power is derived from the bus.
This pin must be grounded in the application.
Pins can be used to provide a logic level output or a logic input.
Input
Ground
Reference
Test
Test
Test
Power
Power
Output
Input
Output
Analog Input
Analog Ground
Test1
IDDQ
Test Output
Bus Return
Bus Return
DBUS Output
DBUS Input
Holding
Capacitor
Inputs to the ADC.
Pin is the low reference level and power return for the analog-to-digital
converter (ADC). It is internally connected to RTNIN.
This pin must be grounded in the application.
Input pin for measuring device quiescent current. Must be left open in the
application.
This pin must be grounded in the application.
Switched RTNIN pin, attaches to the next RTNIN pin in the daisy chain.
Pin attaches to the low side of the differential bus, and provides the common
return for power and signalling. It is internally connected to AGND.
Switched BUSIN Pin, attaches to the next BUSIN pin in the daisy chain.
Pin attaches to the high side of the differential bus and responds to
initialization commands.
A capacitor attached to this pin is charged by the bus during bus idle and
supplies current to run the device and for external devices via the REGOUT
pin during non-idle periods.
33784
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
