FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33395 and 33395T devices are designed to provide
the necessary drive and control signal buffering and
amplification to enable a DSP or MCU to control a three-
phase array of power MOSFETs such as would be required
to energize the windings of powerful brushless DC (BLDC)
motors. It contains built-in charge pump circuitry so that the
MOSFET array may consist entirely of N-Channel
MOSFETs. It also contains feedback sensing circuitry and
control circuitry to provide a robust overall motor control
design.
FUNCTIONAL PIN DESCRIPTION
CHARGE PUMP CAPACITOR (CP2H)
High potential pin connection for secondary charge pump
capacitor
IS MINUS (-ISENS)
Inverting input for current limit comparator
IS PLUS (+ISENS)
CHARGE PUMP RESERVE CAPACITOR (CPRES)
Input from external reservoir capacitor for charge pump
Non-Inverting input for current limit comparator
ANALOG GROUND (AGND)
INPUT VOLTAGE (VIGN)
Input from ignition level supply voltage for power functions
Ground pin for logic functions
LOGIC SUPPLY VOLTAGE (VDD)
HIGH-SIDE GATE VOLTAGE (VGDH)
Output full-time gate drive for auxiliary high-side power
MOSFET switch
Supply voltage for logic functions
PULSE WIDTH MODULATOR (PWM)
Input for pulse width modulated driver duty cycle
INPUT VOLTAGE PROTECTED (VIGNP)
Input from protected ignition level supply for power
functions
MODE CONTROL BIT 1 (MODE1)
Input for mode control selection
HIGH-SIDE SENSE (SRC1, SRC2, SRC3)
Sense for high-side source voltage, phase 1/2/3
MODE CONTROL BIT 0 (MODE0)
Input for mode control selection
GATE DRIVE HIGH (GDH1, GDH2, GDH3)
Output for gate high-side, phase 1/2/3
HIGH-SIDE ENABLE (HSE3, HSE2, HSE1)
Input for high-side enable logic, phase 1/2/3
OUTPUT FOR GATE (GDL1, GDL2, GDL3)
Output for gate drive low-side, phase 1
LOW-SIDE ENABLE (LSE3, LSE2, LSE1)
Input for low-side enable logic, phase 1/2/3
POWER GROUND (PGND)
Ground pins for power functions
EXTERNAL PUMP CAPACITOR (CP1L, CP1H)
Input from external pump capacitor for charge pump and
secondary pins
TEST PIN (TEST)
This should be connected to ground or left open
CHARGE PUMP CAPACITOR (CP2L)
Input from external reservoir, external pump capacitors for
charge pump, and secondary pins
33395
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
