FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 23. Regulator2 Output Voltage Register
0110
Bit
Data1
Data2
3
2
1
0
3
2
1
0
Name
Default
SREG2_V[7]
1
SREG2_V[6]
1
SREG2_V[5]
1
SREG2_V[4]
1
SREG2_V[3]
1
SREG2_V[2]
1
SREG2_V[1]
1
SREG2_V[0]
1
SREG2_V[7]: Reference DAC MSB
1 = SREG2_V[7] on
0 = SREG2_V[7] off
SREG2_V[2]: Reference DAC Bit2
1 = SREG2_V[2] on
0 = SREG2_V[2] off
SREG2_V[6]: Reference DAC Bit6
1 = SREG2_V[6] on
SREG2_V[1]: Reference DAC Bit1
1 = SREG2_V[1] on
0 = SREG2_V[6] off
0 = SREG2_V[1] off
SREG2_V[5]: Reference DAC Bit5
1 = SREG2_V[5] on
SREG2_V[0]: Reference DAC LSB
1 = SREG2_V[0] on
0 = SREG2_V[5] off
0 = SREG2_V[0] off
SREG2_V[4]: Reference DAC Bit4
1 = SREG2_V[4] on
0 = SREG2_V[4] off
Refer to Table 13, Output Voltage of SREG2 on page 21
for the correspondence between the output voltage and
register settings.
SREG2_V[3]: Reference DAC Bit3
1 = SREG2_V[3] on
0 = SREG2_V[3] off
Table 24. Regulator3 Output Voltage Register
0111
Bit
Data1
Data2
3
2
1
0
3
2
1
CP Off
1
0
EXTG On
1
Name
Default
SREG3_V[5]
1
SREG3_V[4]
1
SREG3_V[3]
1
SREG3_V[2]
1
SREG3_V[1]
1
SREG3_V[0]
1
SREG3_V[5]: Reference DAC MSB
1 = SREG3_V[5] on
SREG3_V[0]: Reference DAC LSB
1 = SREG3_V[0] on
0 = SREG3_V[5] off
0 = SREG3_V[0] off
SREG3_V[4]: Reference DAC Bit4
1 = SREG3_V[4] on
CP Off: Charge Pump Control
1 = Charge Pump off
0 = SREG3_V[4] off
0 = Charge Pump on
SREG3_V[3]: Reference DAC Bit3
1 = SREG3_V[3] on
0 = SREG3_V[3] off
EXTG On: VGATE_EXT Control *
1 = VGATE_EXT is low (GND level)
0 = VGATE_EXT is high (VG level)
SREG3_V[2] : Reference DAC Bit2
1 = SREG3_V[2] on
EXTG On Register is assumed to use Pch FET as external
MOSFET.
0 = SREG3_V[2] off
If Nch FET will be used, Control logic should be inverted.
SREG3_V[1] : Reference DAC Bit1
1 = SREG3_V[1] on
0 = SREG3_V[1] off
Refer to Table 14, Output Voltage of SREG3 on page 21
for the correspondence between the output voltage and
register settings.
18730
Analog Integrated Circuit Device Data
Freescale Semiconductor
27
FREESCALE [ Freescale ]
