FUNCTIONAL DEVICE OPERATION
BATTERY INTERFACE AND CONTROL
f) If the enumeration is successful to get the stepped up current the processor will hold WDI high and continues with the
booting procedure.
• When the SPI is activated, the LPB interrupt LPBI can be cleared; other unmasked interrupts may now become active.
When leaving watchdog phase for the On mode, the interrupts will work 'normally' even if LPBI is not cleared.
• The SPI bit ACKLPB bit is set to enable the internal trickle charger. The charge LED gets activated. When the battery
crosses the BATTMIN threshold the M3.transistor is automatically closed and the battery is charged with the current not
taken by the application.
• When BP exceeds BPON, the charger state machine will successfully exit the trickle charge mode. This will make
LPBS = 0 which generates a LPBI. This interrupt will inform the processor that a full turn on is allowed. Once this
happens the application code is allowed to run full speed.
BATTERY THERMISTOR CHECK OPERATION
By default, the battery thermistor value is taken into account for charging the battery. Upon detection of a supply at
CHRGRAW, the core circuitry powers up including VCORE. As soon as VCORE is ready, the output GPO1 is made active high,
independently of the state of GPO1EN bit. The resulting voltage at ADIN5 is compared to the corresponding temperature
thresholds. If the voltage at ADIN5 is within range, the charging will behave as described thus far, however if out of range the
charger state machine will go to a wait state, pause the charge timers, and no current will be sourced to the battery. When the
temperature comes back in range, charging is continued again. The actual behavior depends on the configuration the charger
circuitry at the moment the temperature range is exceeded.
Table 80. Battery Thermistor Check Charger States
State for temperature
out of range
State for temperature back in range
Configuration
ICin “On” State
IC in “Off” State
M1M2 = 560 mA / SPI setting,
M3 = Open, Itrickle = 0mA
Internal precharge
Low Power Boot Precharge
Initialization
Initialization
Internal precharging on a charger
Internal precharging on USB in USB
Low Power Boot
M1M2 = 400 mA
M3 = Open, Itrickle = 0mA
Initialization
Initialization
All other non fault charging modes
and configurations
M1M2 = 0 mA
M3 Closed
The battery thermistor check can be disabled by setting the THCHKB bit. This is useful in applications where battery packs
without thermistor may be used. This bit defaults to '0', which means that initial power up only can be achieved with an already
charged battery pack or on a charger, but not on a USB Host without low power boot support. Alternatively, one can bias ADIN5
to get within the temperature window. Setting the SPI bit to disable the thermistor check will also inhibit the automatic enabling
of the GPO1 output. The GPO1 output still remains controllable through GPO1EN. As an additional feature, the charger state
machine will end up in an out of temperature state when the die temperature is below -20 °C, independent of the setting of the
THCHKB bit.
Notes:
• When using the battery charger as the only source of power, as in a battery-less application, the following precautions
should be observed:
• It is still necessary to connect ADIN5 to either VCOREDIG or a midpoint of a divider from GPIO1 to ground since the battery
charger will still interpret this voltage as the battery pack thermistor by default.
• Very careful budgeting of the total current consumption and voltage standoff from CHRGRAW to BPSNS must be made,
since the power limiter is operational by default, and a battery less system won't have a source of current if the power
dissipation limit is reached.
• If operating from a USB host the unit load limit (100 mA max.) must still be observed.
• If operating from a “wall charger”, and if there is no battery, there is an period of approximately 85 ms after RESETB is
released, but before the current limit is set to a nominal 560 mA. If the total current demand is greater than this limit, the
voltage may collapse and RESETB may pulse a few times (depending in part in the system load and dependence on
RESETB.) Therefore, at the end of this time, RESETB may or may not be active. It may be necessary to use one of the
other turn on events (such as PWRONx) to turn it back on.
13892
Analog Integrated Circuit Device Data
98
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