FUNCTIONAL DEVICE OPERATION
BATTERY INTERFACE AND CONTROL
BUILDING BLOCKS AND FUNCTIONS
The battery management interface consists of several building blocks and functions as depicted in the block diagram shown
in the previous paragraph. These building blocks and functions are described below while the charger operation is described in
the next section.
CHARGE PATH REGULATOR
The M1 and M2 are permanently used as a combined pass device for a super regulator, with a programmable output voltage
and programmable current limit.
The voltage loop consists of M1, M2, and an amplifier with voltage feedback taken from the BPSNS pin. The value of the sense
resistor is of no influence on the output voltage. The output voltage is programmable by SPI through VCHRG[2:0] bits.
Table 62. Charge Path Regulator Voltage Settings
VCHRG[2:0]
Charge Regulator Output Voltage (V)
000
001
010
3.800
4.100
4.150
4.200
4.250
4.300
4.375
4.450
011 (default)
100
101
110
111
The current loop is composed of the M1 and M2 as control elements, the external sense resistor, a programmable current limit,
and an amplifier. The control loop will regulate the voltage drop over the external resistor. The value of the external resistor
therefore is of influence on the charge current. The charge current is programmable by SPI through ICHRG[3:0] bits. Each setting
corresponds to a common use case. Software controlled pulsed charging can be obtained by programming the current
periodically to zero.
Table 63. Charge Path Regulator Current Limit Settings
Charge Regulator
ICHRG[3:0]
0000
Specific Use Case
Current Limit (mA)
0
Off
Standalone Charging Default for
precharging, USB charging, and LPB
0001
80
0010
0011
240
320
Advised setting for USB charging with
PHY active
0100
400
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
480
560
Standalone Charging Default
640
720
800
880
960
1040
1200
1600
High Current Charger
High Current Charger
Fully On – M3
Open
1111
Externally Powered
13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
90