SPI BITMAP
Table 127. Register 15, Power Control 2
Name
Bit #
R/W
Reset
Default
Description
PWRON3RSTEN
PWRON1DBNC0
PWRON1DBNC1
PWRON2DBNC0
PWRON2DBNC1
PWRON3DBNC0
PWRON3DBNC1
STANDBYINV
STANDBYSECINV
WDIRESET
3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
RTCPORB
RTCPORB
RTCPORB
RTCPORB
RTCPORB
RTCPORB
RTCPORB
RTCPORB
RTCPORB
RESETB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
Enables system reset on PWRON3 pin
4
Sets debounce time on PWRON1 pin
Sets debounce time on PWRON2 pin
Sets debounce time on PWRON3 pin
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
If set then STANDBY is interpreted as active low
If set then STANDBYSEC is interpreted as active low
Enables system reset through WDI
SPIDRV0
RTCPORB
RTCPORB
SPI drive strength
SPIDRV1
Reserved
For future use
Reserved
R
CLK32KDRV0
CLK32KDRV1
Reserved
R/W
R/W
R
RTCPORB
RTCPORB
CLK32K and CLK32KMCU drive strength (master control bits)
Reserved
R
For future use
Reserved
R
STBYDLY0
R/W
R/W
RESETB
RESETB
Standby delay control
STBYDLY1
Table 128. Register 16, Unused
Name
Unused
Bit #
R/W
Reset
Reset
Default
Description
23-0
R
0
Not available
Table 129. Register 17, Unused
Name
Unused
Bit #
R/W
Default
Description
23-0
R
0
Not available
13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
130
FREESCALE [ Freescale ]
